For high-speed avalanche photodiode operating at data rate of 25 GHz or beyond, typically a thin avalanche layer is needed for reducing the buildup time in the avalanche layer. A conventional structure of a germanium (Ge) on silicon (Si) avalanche photodiode (Ge/Si APD) is shown in FIG. 6. However, this conventional structure tends to encounter some problems when Si avalanche layer becomes very thin (e.g., 100 nm). Firstly, a thin Si layer leads to the reduction of thickness of depleted region and results in increment of capacitance, thereby increasing the RC time and reducing the bandwidth of the photodiode. Secondly, a thin intrinsic Si avalanche layer tends to be greatly impacted by the n+ bottom Si contact layer. Silicon is different from III-V material and has a relatively high density of state in the conduction band (2.9×1019/cm3) at 300K, which means it typically requires a heavily doped Si (such as 1×1019/cm3) to form contact layer. On the other hand, the intrinsic Si avalanche layer should have very low doping concentration (such as 1×1015/cm3) for making a uniform electric field inside the avalanche layer. The existence of huge concentration difference between intrinsic Si (i-Si) layer and heavily n+ doped Si (n+Si) layer tends to cause carrier diffusion or auto doping effect during epitaxial growth, and these will affect the doping profile in avalanche layer and then affect thickness of depleted region and impact the electric field as shown in FIG. 7.